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platformio.ini.bak copilot/add-rtnode-configuration-options (9529fa8a) Text, 13.47 KB

Tb4b4b4; Te6edf3PlatformIO Te6edf3Project Te6edf3Configuration Te6edf3File
Tb4b4b4;
Tb4b4b4; Te6edf3Build Te6edf3optionsTb4b4b4: Te6edf3build Te6edf3flagsTb4b4b4, Te6edf3source Te6edf3filter
Tb4b4b4; Te6edf3Upload Te6edf3optionsTb4b4b4: Te6edf3custom Te6edf3upload Te6edf3portTb4b4b4, Te6edf3speed Tff7b72and Te6edf3extra Te6edf3flags
Tb4b4b4; Te6edf3Library Te6edf3optionsTb4b4b4: Te6edf3dependenciesTb4b4b4, Te6edf3extra Te6edf3library Te6edf3storages
Tb4b4b4; Te6edf3Advanced Te6edf3optionsTb4b4b4: Te6edf3extra Te6edf3scripting
Tb4b4b4;
Tb4b4b4; Te6edf3Please Te6edf3visit Te6edf3documentation Tff7b72for Te6edf3the Te6edf3other Te6edf3options Tff7b72and Te6edf3examples
Tb4b4b4; Te6edf3httpsTb4b4b4:Tff7b72/Tff7b72/Te6edf3docsTff7b72.Td2a8ffplatformioTff7b72.Td2a8fforgTff7b72/Te6edf3pageTff7b72/Te6edf3projectconfTff7b72.Td2a8ffhtml

Tb4b4b4[Te6edf3platformioTb4b4b4]
Tb4b4b4; Te6edf3Change Te6edf3source Tff7b72and Te6edf3include Te6edf3directories Te6edf3to Te6edf3root Te6edf3of Te6edf3project Te6edf3since Te6edf3RNode Te6edf3places Te6edf3them Te6edf3here
Te6edf3include_dir Tff7b72= Tff7b72.
Te6edf3src_dir Tff7b72= Tff7b72.

Tb4b4b4[Te6edf3envTb4b4b4]
Te6edf3framework Tff7b72= Te6edf3arduino
Te6edf3monitor_speed Tff7b72= T79c0ff115200
Te6edf3upload_speed Tff7b72= T79c0ff460800
Te6edf3build_flags Tff7b72=
Tff7b72-Te6edf3Wall
Tb4b4b4;Tff7b72-Te6edf3Wextra
Tff7b72-Te6edf3WnoTff7b72-Te6edf3missingTff7b72-Te6edf3fieldTff7b72-Te6edf3initializers
Tff7b72-Te6edf3WnoTff7b72-Te6edf3format
Tff7b72-Te6edf3ITff7b72.
Tb4b4b4; Te6edf3CBA Te6edf3Define Te6edf3following Te6edf3to Te6edf3disable Te6edf3DEBUG Te6edf3build
Tb4b4b4;Tff7b72-Te6edf3DNDEBUG
Tb4b4b4; Te6edf3CBA Te6edf3Define Te6edf3following Te6edf3to Te6edf3include Te6edf3RNS Te6edf3stack
Tff7b72-Te6edf3DHAS_RNS
Tff7b72-Te6edf3DRNS_USE_FS
Tff7b72-Te6edf3DRNS_PERSIST_PATHS
Tff7b72-Te6edf3DMSGPACK_USE_BOOSTTff7b72=Te6edf3OFF
Tb4b4b4; Te6edf3CBA Te6edf3Define Te6edf3following Te6edf3to Te6edf3disable Te6edf3LFS Te6edf3asserts
Tb4b4b4;Tff7b72-Te6edf3DLFS_NO_ASSERT
Tb4b4b4; ???
Tb4b4b4;Tff7b72-Te6edf3DLFS_YES_TRACE
Tb4b4b4; ???
Tb4b4b4;Tff7b72-Te6edf3DCORE_DEBUG_LEVELTff7b72=T79c0ff5
Tb4b4b4; ??? Te6edf3NO
Tb4b4b4;Tff7b72-Te6edf3DLOG_LOCAL_LEVELTff7b72=T79c0ff5
Tb4b4b4;Tff7b72-Te6edf3DCONFIG_LOG_DEFAULT_LEVELTff7b72=T79c0ff5
Te6edf3lib_deps Tff7b72=
Te6edf3ArduinoJson@Tff7b72^T79c0ff7.4Tff7b72.T79c0ff2
Te6edf3MsgPack@Tff7b72^T79c0ff0.4Tff7b72.T79c0ff2
Te6edf3adafruitTff7b72/Te6edf3Adafruit Te6edf3SSD1306@Tff7b72^T79c0ff2.5Tff7b72.T79c0ff9
Te6edf3httpsTb4b4b4:Tff7b72/Tff7b72/Te6edf3githubTff7b72.Td2a8ffcomTff7b72/Te6edf3attermannTff7b72/Te6edf3CryptoTff7b72.Td2a8ffgit
Tb4b4b4; Te6edf3Exclude Te6edf3directories Tff7b72in Te6edf3root Te6edf3from Te6edf3sources
Te6edf3build_src_filter Tff7b72= Tff7b72+Tff7b72<Tff7b72*Tff7b72> Tff7b72-Tff7b72<Te6edf3variantsTff7b72/Tff7b72>
Te6edf3extra_scripts Tff7b72= Te6edf3preTb4b4b4:Te6edf3extra_scriptTff7b72.Td2a8ffpy

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3rnodeTff7b72-Te6edf3ngTff7b72-T79c0ff20Tb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3ttgoTff7b72-Te6edf3lora32Tff7b72-Te6edf3v2
Te6edf3custom_variant Tff7b72= Te6edf3ng20
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_RNODE_NG_20
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3adafruitTff7b72/Te6edf3Adafruit Te6edf3NeoPixel@Tff7b72^T79c0ff1.12Tff7b72.T79c0ff0
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3rnodeTff7b72-Te6edf3ngTff7b72-T79c0ff21Tb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3ttgoTff7b72-Te6edf3lora32Tff7b72-Te6edf3v21
Te6edf3custom_variant Tff7b72= Te6edf3ng21
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_RNODE_NG_21
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3adafruitTff7b72/Te6edf3Adafruit Te6edf3NeoPixel@Tff7b72^T79c0ff1.12Tff7b72.T79c0ff0
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3ttgoTff7b72-Te6edf3tTff7b72-Te6edf3beamTb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3ttgoTff7b72-Te6edf3tTff7b72-Te6edf3beam
Te6edf3custom_variant Tff7b72= Te6edf3tbeam
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_TBEAM
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3ttgoTff7b72-Te6edf3tTff7b72-Te6edf3beamTff7b72-Te6edf3sx1262Tb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3ttgoTff7b72-Te6edf3tTff7b72-Te6edf3beam
Te6edf3custom_variant Tff7b72= Te6edf3tbeam_sx1262
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_TBEAM
Tff7b72-Te6edf3DMODEMTff7b72=Te6edf3SX1262
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3ttgoTff7b72-Te6edf3tTff7b72-Te6edf3beamTff7b72-Te6edf3supremeTb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3ttgoTff7b72-Te6edf3tTff7b72-Te6edf3beam
Te6edf3custom_variant Tff7b72= Te6edf3tbeam_supreme
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_TBEAM_S_V1
Tff7b72-Te6edf3DMODEMTff7b72=Te6edf3SX1262
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3Adafruit_SH110X
Te6edf3adafruitTff7b72/Te6edf3Adafruit Te6edf3SH110X@Tff7b72^T79c0ff2.1Tff7b72.T79c0ff14
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3lilygoTff7b72-Te6edf3t3Tff7b72-Te6edf3s3Tb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3lilygoTff7b72-Te6edf3t3Tff7b72-Te6edf3s3
Te6edf3custom_variant Tff7b72= Te6edf3t3s3
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_T3S3
Tff7b72-Te6edf3DMODEMTff7b72=Te6edf3SX1262
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3lilygoTff7b72-Te6edf3t3Tff7b72-Te6edf3s3Tff7b72-Te6edf3sx127xTb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3lilygoTff7b72-Te6edf3t3Tff7b72-Te6edf3s3
Te6edf3custom_variant Tff7b72= Te6edf3t3s3_sx127x
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_T3S3
Tff7b72-Te6edf3DMODEMTff7b72=Te6edf3SX1276
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3lilygoTff7b72-Te6edf3t3Tff7b72-Te6edf3s3Tff7b72-Te6edf3sx1280Tff7b72-Te6edf3paTb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3lilygoTff7b72-Te6edf3t3Tff7b72-Te6edf3s3
Te6edf3custom_variant Tff7b72= Te6edf3t3s3_sx1280_pa
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_T3S3
Tff7b72-Te6edf3DMODEMTff7b72=Te6edf3SX1280
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3lilygoTff7b72-Te6edf3tTff7b72-Te6edf3deckTb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3esp32Tff7b72-Te6edf3s3Tff7b72-Te6edf3devkitcTff7b72-T79c0ff1
Te6edf3custom_variant Tff7b72= Te6edf3tdeck
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Tb4b4b4; Te6edf3Flash Tff7b72/ Te6edf3memory Te6edf3layout
Te6edf3board_uploadTff7b72.Td2a8ffflash_size Tff7b72= T79c0ff16Te6edf3MB
Te6edf3board_uploadTff7b72.Td2a8ffmaximum_size Tff7b72= T79c0ff16777216
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3default_16MBTff7b72.Td2a8ffcsv
Tb4b4b4; Te6edf3Enable Te6edf3PSRAM Tff7b72+ Te6edf3correct Te6edf3flash Te6edf3mode
Te6edf3board_buildTff7b72.Td2a8ffflash_mode Tff7b72= Te6edf3qio
Te6edf3board_buildTff7b72.Td2a8ffpsram_type Tff7b72= Te6edf3opi
Te6edf3board_buildTff7b72.Td2a8ffarduinoTff7b72.Td2a8ffmemory_type Tff7b72= Te6edf3qio_opi
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_TDECK
Tff7b72-Te6edf3DBOARD_HAS_PSRAMTff7b72=T79c0ff1
Tff7b72-Te6edf3DARDUINO_USB_MODETff7b72=T79c0ff1
Tff7b72-Te6edf3DCORE_DEBUG_LEVELTff7b72=T79c0ff1
Tb4b4b4; Te6edf3Enable Te6edf3UARDUINO_ Te6edf3USB_ Te6edf3CDC_ Te6edf3ON_ Te6edf3BOOT Te6edf3will Te6edf3start Te6edf3printing Tff7b72and Te6edf3wait Tff7b72for Te6edf3terminal Te6edf3access Te6edf3during Te6edf3startup
Tff7b72-Te6edf3DARDUINO_USB_CDC_ON_BOOTTff7b72=T79c0ff1
Tb4b4b4; Te6edf3Enable Te6edf3UARDUINO_USB_CDC_ON_BOOT Te6edf3will Te6edf3turn Te6edf3off Te6edf3printing Tff7b72and Te6edf3will Tff7b72not Te6edf3block Te6edf3when Te6edf3using Te6edf3the Te6edf3battery
Tb4b4b4; Tff7b72-Te6edf3UARDUINO_USB_CDC_ON_BOOT
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3ttgoTff7b72-Te6edf3lora32Tff7b72-Te6edf3v1Tb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3ttgoTff7b72-Te6edf3lora32Tff7b72-Te6edf3v1
Te6edf3custom_variant Tff7b72= Te6edf3lora32v10
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_LORA32_V1_0
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3ttgoTff7b72-Te6edf3lora32Tff7b72-Te6edf3v2Tb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3ttgoTff7b72-Te6edf3lora32Tff7b72-Te6edf3v2
Te6edf3custom_variant Tff7b72= Te6edf3lora32v20
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_LORA32_V2_0
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3ttgoTff7b72-Te6edf3lora32Tff7b72-Te6edf3v2Tff7b72-Te6edf3extledTb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3ttgoTff7b72-Te6edf3lora32Tff7b72-Te6edf3v2
Te6edf3custom_variant Tff7b72= Te6edf3lora32v20_extled
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_LORA32_V1_0
Tff7b72-Te6edf3DEXTERNAL_LEDSTff7b72=Tff7b72true
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3ttgoTff7b72-Te6edf3lora32Tff7b72-Te6edf3v21Tb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3ttgoTff7b72-Te6edf3lora32Tff7b72-Te6edf3v21
Te6edf3custom_variant Tff7b72= Te6edf3lora32v21
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_LORA32_V2_1
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3ttgoTff7b72-Te6edf3lora32Tff7b72-Te6edf3v21Tff7b72-Te6edf3extledTb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3ttgoTff7b72-Te6edf3lora32Tff7b72-Te6edf3v21
Te6edf3custom_variant Tff7b72= Te6edf3lora32v21_extled
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_LORA32_V2_1
Tff7b72-Te6edf3DEXTERNAL_LEDSTff7b72=Tff7b72true
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3ttgoTff7b72-Te6edf3lora32Tff7b72-Te6edf3v21Tff7b72-Te6edf3tcxoTb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3ttgoTff7b72-Te6edf3lora32Tff7b72-Te6edf3v21
Te6edf3custom_variant Tff7b72= Te6edf3lora32v21_extled
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_LORA32_V2_1
Tff7b72-Te6edf3DENABLE_TCXOTff7b72=Tff7b72true
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3heltec_wifi_lora_32_V2Tb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3heltec_wifi_lora_32_V2
Te6edf3custom_variant Tff7b72= Te6edf3heltec32v2
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_LORA32_V2_1
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3heltec_wifi_lora_32_V2Tff7b72-Te6edf3extledTb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3heltec_wifi_lora_32_V2
Te6edf3custom_variant Tff7b72= Te6edf3heltec32v2_extled
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_LORA32_V2_1
Tff7b72-Te6edf3DEXTERNAL_LEDSTff7b72=Tff7b72true
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3heltec_wifi_lora_32_V3Tb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3heltec_wifi_lora_32_V3
Te6edf3custom_variant Tff7b72= Te6edf3heltec32v3
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_HELTEC32_V3
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3heltec_wifi_lora_32_V4Tb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3esp32Tff7b72-Te6edf3s3Tff7b72-Te6edf3devkitcTff7b72-T79c0ff1
Te6edf3custom_variant Tff7b72= Te6edf3heltec32v4
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_HELTEC32_V4
Tff7b72-Te6edf3DARDUINO_USB_CDC_ON_BOOTTff7b72=T79c0ff1
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3heltec_V4_boundaryTb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3esp32Tff7b72-Te6edf3s3Tff7b72-Te6edf3devkitcTff7b72-T79c0ff1
Te6edf3custom_variant Tff7b72= Te6edf3heltec32v4_boundary
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Tb4b4b4; Te6edf3Flash Tff7b72/ Te6edf3memory Te6edf3layout Tff7b72for T79c0ff16Te6edf3MB Te6edf3flash Tff7b72+ T79c0ff2Te6edf3MB Te6edf3PSRAM
Te6edf3board_uploadTff7b72.Td2a8ffflash_size Tff7b72= T79c0ff16Te6edf3MB
Te6edf3board_uploadTff7b72.Td2a8ffmaximum_size Tff7b72= T79c0ff16777216
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3default_16MBTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8ffflash_mode Tff7b72= Te6edf3qio
Te6edf3board_buildTff7b72.Td2a8ffpsram_type Tff7b72= Te6edf3qio
Te6edf3board_buildTff7b72.Td2a8ffarduinoTff7b72.Td2a8ffmemory_type Tff7b72= Te6edf3qio_qspi
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_HELTEC32_V4
Tff7b72-Te6edf3DARDUINO_USB_CDC_ON_BOOTTff7b72=T79c0ff1
Tff7b72-Te6edf3DBOARD_HAS_PSRAMTff7b72=T79c0ff1
Tff7b72-Te6edf3DBOUNDARY_MODE
Tb4b4b4; Tff7b72-Tff7b72-Tff7b72- Te6edf3Boundary Te6edf3mode Te6edf3defaults Tb4b4b4(Te6edf3override Te6edf3via Te6edf3EEPROM Te6edf3at Te6edf3runtimeTb4b4b4) Tff7b72-Tff7b72-Tff7b72-
Tb4b4b4; Te6edf3TCP Te6edf3server Te6edf3mode Tb4b4b4(T79c0ff0Tff7b72=Te6edf3serverTb4b4b4, T79c0ff1Tff7b72=Te6edf3clientTb4b4b4)
Tff7b72-Te6edf3DBOUNDARY_TCP_MODETff7b72=T79c0ff0
Tb4b4b4; Te6edf3TCP Te6edf3listenTff7b72/Te6edf3connect Te6edf3port
Tff7b72-Te6edf3DBOUNDARY_TCP_PORTTff7b72=T79c0ff4242
Tb4b4b4; Te6edf3Backbone Te6edf3host Tff7b72for Te6edf3client Te6edf3mode Tb4b4b4(Te6edf3empty Tff7b72= Te6edf3server Te6edf3modeTb4b4b4)
Tb4b4b4; Tff7b72-Te6edf3DBOUNDARY_BACKBONE_HOSTTff7b72=\Ta5d6ff"Ta5d6ff192.168.1.100Tffea00\"
Tb4b4b4; Tff7b72-Te6edf3DBOUNDARY_BACKBONE_PORTTff7b72=T79c0ff4242
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum
Te6edf3monitor_filters Tff7b72= Te6edf3esp32_exception_decoder

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3heltec_V4_boundaryTff7b72-Te6edf3localTb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3esp32Tff7b72-Te6edf3s3Tff7b72-Te6edf3devkitcTff7b72-T79c0ff1
Te6edf3custom_variant Tff7b72= Te6edf3heltec32v4_boundary_local
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3board_uploadTff7b72.Td2a8ffflash_size Tff7b72= T79c0ff16Te6edf3MB
Te6edf3board_uploadTff7b72.Td2a8ffmaximum_size Tff7b72= T79c0ff16777216
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3default_16MBTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8ffflash_mode Tff7b72= Te6edf3qio
Te6edf3board_buildTff7b72.Td2a8ffpsram_type Tff7b72= Te6edf3qio
Te6edf3board_buildTff7b72.Td2a8ffarduinoTff7b72.Td2a8ffmemory_type Tff7b72= Te6edf3qio_qspi
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_HELTEC32_V4
Tff7b72-Te6edf3DARDUINO_USB_CDC_ON_BOOTTff7b72=T79c0ff1
Tff7b72-Te6edf3DBOARD_HAS_PSRAMTff7b72=T79c0ff1
Tff7b72-Te6edf3DBOUNDARY_MODE
Tff7b72-Te6edf3DBOUNDARY_TCP_MODETff7b72=T79c0ff0
Tff7b72-Te6edf3DBOUNDARY_TCP_PORTTff7b72=T79c0ff4242
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3microReticulumTff7b72=Te6edf3symlinkTb4b4b4:Tff7b72/Tff7b72/Tff7b72.Tff7b72.Tff7b72/Te6edf3microReticulum
Te6edf3monitor_filters Tff7b72= Te6edf3esp32_exception_decoder

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3featheresp32Tb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3featheresp32
Te6edf3custom_variant Tff7b72= Te6edf3featheresp32
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_HUZZAH32
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3seeed_xiao_esp32s3Tb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3seeed_xiao_esp32s3
Te6edf3custom_variant Tff7b72= Te6edf3xiao_esp32s3
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_XIAO_S3
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3genericTff7b72-Te6edf3esp32Tb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3esp32dev
Te6edf3custom_variant Tff7b72= Te6edf3esp32_generic
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_GENERIC_ESP32
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3attermannTff7b72/Te6edf3microReticulum

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3wiscore_rak4631Tb4b4b4]
Te6edf3platform Tff7b72= Te6edf3nordicnrf52
Te6edf3board Tff7b72= Te6edf3rak4630
Te6edf3custom_variant Tff7b72= Te6edf3rak4631
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_src_filter Tff7b72= Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_src_filterTb4b4b4} Tff7b72+Tff7b72<Te6edf3variantsTff7b72/Te6edf3rak4630Tff7b72>
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3I Te6edf3variantsTff7b72/Te6edf3rak4630
Tff7b72-Te6edf3fexceptions
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_RAK4631
Tff7b72-Te6edf3DRNS_USE_TLSFTff7b72=T79c0ff1
Tff7b72-Te6edf3DRNS_USE_ALLOCATORTff7b72=T79c0ff1
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3attermannTff7b72/Te6edf3microReticulum



Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3ttgoTff7b72-Te6edf3tTff7b72-Te6edf3beamTff7b72-Te6edf3localTb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3ttgoTff7b72-Te6edf3tTff7b72-Te6edf3beam
Te6edf3upload_speed Tff7b72= T79c0ff460800
Te6edf3custom_variant Tff7b72= Te6edf3tbeam_local
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3fexceptions
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_TBEAM
Tb4b4b4; Te6edf3CBA Te6edf3TEST
Tb4b4b4;Tff7b72-Te6edf3DUSE_FLASHFSTff7b72=T79c0ff1
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3microReticulumTff7b72=Te6edf3symlinkTb4b4b4:Tff7b72/Tff7b72/Tff7b72.Tff7b72.Tff7b72/Te6edf3microReticulum
Te6edf3Adafruit_SPIFlashTff7b72=Te6edf3symlinkTb4b4b4:Tff7b72/Tff7b72/Tff7b72.Tff7b72.Tff7b72/Te6edf3Adafruit_SPIFlash
Te6edf3monitor_filters Tff7b72= Te6edf3esp32_exception_decoder

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3ttgoTff7b72-Te6edf3lora32Tff7b72-Te6edf3v21Tff7b72-Te6edf3localTb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3ttgoTff7b72-Te6edf3lora32Tff7b72-Te6edf3v21
Te6edf3upload_speed Tff7b72= T79c0ff460800
Te6edf3custom_variant Tff7b72= Te6edf3lora32v21_local
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_LORA32_V2_1
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3microReticulumTff7b72=Te6edf3symlinkTb4b4b4:Tff7b72/Tff7b72/Tff7b72.Tff7b72.Tff7b72/Te6edf3microReticulum
Te6edf3monitor_filters Tff7b72= Te6edf3esp32_exception_decoder

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3heltec_wifi_lora_32_V4Tff7b72-Te6edf3localTb4b4b4]
Te6edf3platform Tff7b72= Te6edf3espressif32
Te6edf3board Tff7b72= Te6edf3esp32Tff7b72-Te6edf3s3Tff7b72-Te6edf3devkitcTff7b72-T79c0ff1
Te6edf3custom_variant Tff7b72= Te6edf3heltec32v4_local
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_HELTEC32_V4
Tff7b72-Te6edf3DARDUINO_USB_CDC_ON_BOOTTff7b72=T79c0ff1
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3XPowersLib@Tff7b72^T79c0ff0.2Tff7b72.T79c0ff1
Te6edf3microReticulumTff7b72=Te6edf3symlinkTb4b4b4:Tff7b72/Tff7b72/Tff7b72.Tff7b72.Tff7b72/Te6edf3microReticulum
Te6edf3monitor_filters Tff7b72= Te6edf3esp32_exception_decoder

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3wiscore_rak4631Tff7b72-Te6edf3localTb4b4b4]
Te6edf3platform Tff7b72= Te6edf3nordicnrf52
Te6edf3board Tff7b72= Te6edf3rak4630
Te6edf3custom_variant Tff7b72= Te6edf3rak4631_local
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_src_filter Tff7b72= Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_src_filterTb4b4b4} Tff7b72+Tff7b72<Te6edf3variantsTff7b72/Te6edf3rak4630Tff7b72>
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3I Te6edf3variantsTff7b72/Te6edf3rak4630
Tff7b72-Te6edf3fexceptions
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_RAK4631
Tb4b4b4; Te6edf3CBA Te6edf3TEST
Tff7b72-Te6edf3DRNS_USE_TLSFTff7b72=T79c0ff1
Tff7b72-Te6edf3DRNS_USE_ALLOCATORTff7b72=T79c0ff1
Tb4b4b4;Tff7b72-Te6edf3DUSE_FLASHFSTff7b72=T79c0ff1
Te6edf3build_unflags Tff7b72= Tff7b72-Te6edf3fnoTff7b72-Te6edf3exceptions
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3microReticulumTff7b72=Te6edf3symlinkTb4b4b4:Tff7b72/Tff7b72/Tff7b72.Tff7b72.Tff7b72/Te6edf3microReticulum
Te6edf3Adafruit_SPIFlashTff7b72=Te6edf3symlinkTb4b4b4:Tff7b72/Tff7b72/Tff7b72.Tff7b72.Tff7b72/Te6edf3Adafruit_SPIFlash

Tb4b4b4[Te6edf3envTb4b4b4:Te6edf3heltec_t114_localTb4b4b4]
Tb4b4b4;Te6edf3upload_port Tff7b72= Tff7b72/Te6edf3devTff7b72/Te6edf3cuTff7b72.Td2a8ffusbmodem1101
Te6edf3platform Tff7b72= Te6edf3nordicnrf52
Te6edf3board Tff7b72= Te6edf3nrf52840_dk_adafruit
Te6edf3custom_variant Tff7b72= Te6edf3heltec_t114_local
Te6edf3board_buildTff7b72.Td2a8ffpartitions Tff7b72= Te6edf3no_otaTff7b72.Td2a8ffcsv
Te6edf3board_buildTff7b72.Td2a8fffilesystem Tff7b72= Te6edf3littlefs
Te6edf3build_flags Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8ffbuild_flagsTb4b4b4}
Tff7b72-Te6edf3fexceptions
Tff7b72-Te6edf3DBOARD_MODELTff7b72=Te6edf3BOARD_HELTEC_T114
Tb4b4b4; Te6edf3CBA Te6edf3TEST
Tff7b72-Te6edf3DRNS_USE_TLSFTff7b72=T79c0ff1
Tff7b72-Te6edf3DRNS_USE_ALLOCATORTff7b72=T79c0ff1
Te6edf3build_unflags Tff7b72= Tff7b72-Te6edf3fnoTff7b72-Te6edf3exceptions
Te6edf3lib_deps Tff7b72=
Tff7b72$Tb4b4b4{Te6edf3envTff7b72.Td2a8fflib_depsTb4b4b4}
Te6edf3httpsTb4b4b4:Tff7b72/Tff7b72/Te6edf3githubTff7b72.Td2a8ffcomTff7b72/Te6edf3liamcottleTff7b72/Te6edf3esp8266Tff7b72-Te6edf3oledTff7b72-Te6edf3ssd1306T8b949e#e16cee124fe26490cb14880c679321ad8ac89c95
Te6edf3adafruitTff7b72/Te6edf3Adafruit Te6edf3NeoPixel@Tff7b72^T79c0ff1.12Tff7b72.T79c0ff0
Te6edf3microReticulumTff7b72=Te6edf3symlinkTb4b4b4:Tff7b72/Tff7b72/Tff7b72.Tff7b72.Tff7b72/Te6edf3microReticulum

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